Pb-Free Component and Board Finish Reliability

Chair:  Houssam Jomaa, Intel Corporation
Co-Chair:  Richard Coyle, Alcatel-Lucent

The transition to Pb-free solder alloys introduces new concerns regarding solder joint reliability.  The implementation of alternative surface finishes for circuit boards and package substrates/leadframes compounds these reliability concerns.  Although multiple studies are investigating the impact of Pb-free solder and alternative board finishes on board-level temperature cycling lifetime, few studies have dealt with the impact of these new material sets on solder joint reliability.

Scope of Work:

Comparative reliability testing will be conducted on Pb-free components assembled on test boards.  Test board assemblies will be configured to evaluate multiple component surface finishes and 2 circuit board surface finishes.  The reliability testing will be conducted with mechanical testing - with and without aging.  Mechanical testing will consist of 4-point monotonic bend testing (IPC/JEDEC-9702) and drop testing.

The component surface finishes to be evaluated are listed below:

  1. Electrolytic Ni/Au
  2. Electroless Ni/Au (ENIG)
  3. SnAgCu solder over Cu
  4. Matte Sn over Cu
  5. Matte Sn over Ni/Cu
  6. Au/Pd/Ni
  7. SnBi over Cu
The 2 printed wiring board (PWB) surface finishes will be evaluated as follows:
  1. Electrolytic NiAu
  2. Organic Solderability Preservative (OSP)

Statement of Work, Version 18.0 (6/23/08)

Project Statement, Version 18.0 (6/23/08) (Sign up ends July 31, 2008)